Electronics For You

Icarus Verilog: Your First Step Into Digital Design

Learn how a free tool lets you build and test digital circuits on your computer and see how chips really work before making ...
EDN

An overview of SystemVerilog 3.1

SystemVerilog is an extensive set of enhancements to the IEEE 1364 Verilog-2001 standard. These enhancements provide powerful new capabilities for modeling hardware at the RTL and system level, along ...
Design-Reuse

SystemVerilog reference verification methodology: RTL

Verification remains the single biggest challenge in the design of system-on-chip (SoC) devices and reusable IP blocks. As designs continue to grow in size and complexity, new techniques emerge that ...
EDN

Translator bridges Vera code to SystemVerilog 3.1

Santa Cruz, Calif. – Startup VeriEZ Solutions Inc. has announced fourth-quarter availability of EZTranslate, which will serve as a bridge between Synopsys Inc.'s Vera-based verification environments ...